The Very Last Week
It's Wednesday, July 30th and that means I have less than 6 hours to fully prepare for my poster presentation tomorrow (and pack). This entire week I have fluctuated between PCB layout design in gEDA software and finalizing the internship, though I have made the personal decision to continue my involvement beyond this summer. This entire week has been very active and I barely have time to come up for air.
Over the last few days, I have submitted several renditions of the PCB layout, resolving issues such as incorrect traces, lost files, placing components on a dual-sided PCB and more. Most Physics and EE students -- including my advisor -- do/did not design a PCB until graduate school. And, here I am, as a rising sophomore, creating my own PCB. As I mentioned before, this internship has given me more skills than I could possibly imagine.
Updates:
Over the last few days, I have submitted several renditions of the PCB layout, resolving issues such as incorrect traces, lost files, placing components on a dual-sided PCB and more. Most Physics and EE students -- including my advisor -- do/did not design a PCB until graduate school. And, here I am, as a rising sophomore, creating my own PCB. As I mentioned before, this internship has given me more skills than I could possibly imagine.
Updates:
- MUXs are placed on the back-side of the board and connected to the top components with "vias"
- Two distinct ground planes have been placed for the "Digital" and "Analog" electronics (not shown)
- The power connectors have been reoriented to be closer to the corresponding ICs pins.
- Ground connections are made using the Thermal tool and connecting directly to the bottom planes.
We are so close to finishing and with each piece of feedback I receive on an updated file, I'm learning more and more about being a critical editor. As I have covered a great deal of work this summer, it only seems logical to follow through with the rest of the project and watch it grow even more. After we finalize the PCB layout, the manufactured board will be pushed to its limits with high clock speeds (16 MHz) and checked for other anomalies. Afterwards we'll build a third prototype -- 8 x (4x4:1) -- to connect to our 8-channel ADC chip. Once we determine the constraints and improve upon them, we will be able to connect to an FPGA (data capture system) and experiment with VHDL programming. Ultimately, the third prototype will provide us with the answer to our question, "Can we build a multiplexed readout circuit or digitizer?"
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