Second Week: Highs and Lows

electronics-tutorials.ws/combination/comb_2.html
On to the second week of work! I believe I have finally started to cross the line from a state of first-time jitters to what I call the "honeymoon stage" -- when all seems hopefully bright and I am in love with my project -- or what others may call the "calm before the storm." Today, I began my work day very early to make-up for the time I lost yesterday, as I was well under the weather. I caught up on all the emails I missed from Prof. Battat and Dr. Phillips, making a list of to-do's before our telephone conference at 10 am. Whereas, in the last meeting, I leaned a bit backwards to make sure I understood the flow of the conversation, I came prepared to engage in this conversation and walk away from the table with a clearer vision of my mission. We discussed:
  • the decision to daisy-chain (string together) four 4:1 multiplexers (mux) to generate what was equivalent to a 16:1, leading us to buy the evaluation boards and begin designing a circuit; 
  • if noise and crosstalk specifications would have a large influence on our muxes (and Dr. Phillips informed us that they wouldn't); 
  • why it is important that our muxes have buffer amplifiers to generate very low output impedance; 
  • and the need to research how compatible the CycloneIV FPGA is to our ADC versus the suggested Texas Instruments (TI) FPGA, particularly for the LVDS format that requires four wires in total.

After the meeting, I added a tab on the project site called "Action Items," which allows us to keep track of all our tasks for the site as we go, and set goals for myself today, primarily to analyze the Mux. Spreadsheet for those with buffer amplifiers and then to generate a circuit schematic for the 4 x (4:1) mux configuration. To cut a long story short, we ended back at the very first mux that was suggested to us, LMH6574MA -- the only one with a buffer amplifier and a quick settling time. With that in mind, I started to research the circuit designs of muxes and discovered that, rather than focusing on the pin configuration, I would actually need to generate the logic patterns for this 16:1 equivalent design by stringing together four 4:1 muxes (top-left).
After bringing up the diagram to Prof. Battat and making sure that I wasn't going too far from where I was supposed to be, I studied up on all my logic, e.g. AND, OR and NOT gates, and Boolean Algebra. I then attempted to generate a truth table like the one in the first diagram for a 4 x (4:1) design (below).

For most of the day, I spent my time figuring out how to generate a logic diagram that would allow one mux to turn "on" with the other three "off" for cycling from Channel 0 to Channel 16. With four input wires (a, b, c, d), I used a combination of logic gates to connect differently to the four 4:1 muxes (A, B, C, D):
  • Mux. A (Blue) is turned on/off by connecting 'a' and 'b' thru a NOR gate 
  • Mux. B (Red) -- by inverting 'a' and then connecting it to 'b' thru an OR gate 
  • Mux. C (Green) -- by inverting 'a' and then connecting it to 'b' thru an AND gate 
  • Mux. D (Orange) -- by connecting to 'a' and 'b' thru an AND gate 
As beautiful and mesmerizing as this chart is, when I sent it out for feedback and editing to Dr. Phillips and Prof. Battat, I realized the terrible truth that it is wrong for the muxes we use. Whereas I have set it up so that one mux turns on when the SD is "high" or "1," the LMH6574MA is actually built to turn "on" when its SD value is "low" or "0".... A lot of blood, sweat and tears for the wrong result. So, tomorrow, the goal is to not just adjust this table for the correct specifications but then also look into FPGA compatibility with ADCs that have LVDS hardware. Four wires from each ADC to one FPGA may make things more crowded than we had hoped and it is important to also acknowledge that set-up. We have two FPGAs to begin the research/comparison process fortunately, but the actual path might extend way beyond that and we might then call in the third collaborator on this project, whose expertise revolves around such devices.

Personal Mechanics Project

"Ships Wheel" and "Marine Desk Lamp" sketches
On top of this electrical readout project, I will also be working with the Science Center machinist, Larry Knowles, on my own personal mechanics project. I met with him briefly this morning about this project and my top choices from the index of potential projects he had. I was immediately smitten with two particular projects: the Marine Desk Lamp and the Ships Wheel. He's currently checking to see if the materials are available, and, hopefully, I'll be able to start my project in roughly 2 weeks, when things become more settled. However, I am excited to come home with a little DIY (do-it-yourself) decor.

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