Second Week II: The Gray Area

4x(4:1) Mux Logic with Gray Code

Breaking my blogging pattern, I'm writing about my work from today as I did quite a bit -- enough for one blog post. Following the last piece of writing, I corrected the logic table for the 4 x (4:1) to fit the specifications of our target multiplexer (mux) LMH6574MA. However, after finishing it, I re-read Dr. Phillips's comments and noticed that, although the set-up diagram is great, it used binary code, meaning more than one input could change at a time and potentially generate a traffic jam with the break in signal patterns. Resultantly, we looked into utilizing gray code -- a digital code designed to allow only one bit (input) to change at a time -- to eliminate the possibility of multiple signal changes colliding into one another.

4x(4:1) Mux Logic with Binary Code

Converting to gray code from binary wasn't too difficult and fortunately did not change most of my original design. I adapted the inputs to correlate with the gray-equivalents of Channels 0-16. I could still separate them easily among four muxes and I only had to switch the logic gates for the SD pins on muxes C and D. (It could have been much, much worse...) Once everything on the table was settled, I went to tame the real beast: generating a gray code counter circuit.

The counter circuit is what forms those necessary inputs and switches between them to give us the changing channels we need to detect. There's several routes to pursue for such a problem:

1. Use a component like a 2-to-4 line decoder/demultiplexer to create 4 inputs, e.g. SN74LVC139A
2. Use a commonly used shift register (as seen below) with flip-flops

I headed for the latter option. Shift registers use flip-flops to do exactly what they sound like: they toggle or "flip-flop" between a high and low signal on a number of wires/inputs, in order to "shift" the gray code among several states or numerals, i.e. it does not have to be sequential. Thankfully, this particular diagram is. As we have four inputs for the configuration, I generated another large table that broke the counter down into:

• present states -- or the gray code -- for the 16 channels;
• the transition state -- or change in value -- between each step;
• and the flip-flop (FF) inputs -- "JK" FFs in this case -- to create the corresponding transition.

I eventually had to color-code the transitions to easily identify the necessary flip-flop actions: 

• For a 0-to-0 shift or "0 > 0,"  J is set to 0 and K doesn't matter (= X)
• For "0 > 1," J = 1 and K = X
• For "1 > 0," J = X and K = 1
• For "1 > 1," J = X and K = 0

KMAPing Example

Basic KMAP diagram

Once you have set-up the state table (above), you generate what are Karnaugh maps or K-MAPS based on the state table for every J and K input. These k-maps tell where the signals are toggled for each nominal value (right). After reading down each column and writing in the subsequent value for the corresponding number in each k-map cell, I then grouped all the areas (equaling a power of 2, 2ⁿ) with a "1" or an "X" in the cell. Those sections are then used to generate our counter logic circuit or our equation for the associated J or K input, by using the coordinates of their location on the k-map, as seen in the example figure to the left (except my labels are reversed, "DCBA," like in the State Table).

KMAPs for JK-Inputs (Updated II)

Updated Figure (II)

In the formulated equation, AND gates are represented by "multiplication," e.g. AB or AC'D', and OR gates by "addition," e.g. CD'+B'. I created a SmartChart (left) to demonstrate the flow schematic for the J inputs. (Note: All J's are then connected together to another component for an output.) I will likewise create one for the K inputs, and, together, the eight logic circuits form two central flip-flop devices and the entire gray code counter for the 4 x (4:1) multiplexer configuration. There are other types of flip-flops I could have used for the shift register, i.e. D flops. However, JK flip-flops are very flexible and can be designed to work just like D flops, simple toggles, and etc. Right now, it seems like we are in good shape and making lots of headway on the multiplexers. Having ordered the evaluation boards, we can soon test the counter and determine whether it really is logical. (Ba-Dum-Tssh)